发明名称 Stages making EEPROM memory cell with trenched condenser, fill trench, form insulating collar, remove filling, construct condenser plates and insulation, and connect tunneling layer with optional DRAM region definition
摘要 The prepared substrate has a lightly-dosed epitaxial layer and lower, more heavily-dosed layer. A trench is formed in the substrate. Its lower region is filled. An insulation collar (168) is formed in the upper section of the trench. The filling is removed. A condenser plate is formed low in the trench in the lightly-doped region. Conductive filler in the trench, forms a second plate, with provision of an intervening dielectric. A dielectric tunnel layer of oxide, nitride or oxy-nitride (300) is formed in the trench, to the boundary surface (201) of a trenched contact of an associated transistor. A suitable conducting protective layer (350) is formed on the tunnel layer. Optionally the dielectric tunnel layer is opened to define DRAM regions.
申请公布号 DE19930748(A1) 申请公布日期 2001.02.01
申请号 DE1999130748 申请日期 1999.07.02
申请人 INFINEON TECHNOLOGIES AG 发明人 ZELSACHER, RUDOLF
分类号 H01L21/8239;H01L21/8242;H01L27/105;(IPC1-7):H01L21/824 主分类号 H01L21/8239
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