| 摘要 |
A semiconductor memory device having an improved step profile between a cell array region and peripheral circuit region, and a method for manufacturing the same, are provided. The semiconductor memory device has a cell array region and a peripheral circuit region surrounding the cell array region. The cell array region includes a plurality of cell capacitors each of which comprises a cell storage electrode and a plate electrode, and a plurality of dummy cell capacitors each of which comprises a dummy storage electrode and a plate electrode. The dummy cell capacitors are formed at the edges of the cell array region. The outermost sidewall of each dummy storage electrode, facing toward the peripheral circuit region, has an inclined profile.
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