| 摘要 |
A Rambus ASIC having a high speed testing function and a testing method thereof are disclosed, in which a high speed test of 500MHz or greater is realized using a low frequency testing system. The Rambus ASIC having a high speed testing function includes a Rambus ASIC chip constituting a master device, which includes an RAC with a first data input/output speed, a Rambus DRAM constituting a slave device, a test comparator for driving or comparing data at a second speed lower than the first data input/output speed through each I/O pin in the Rambus ASIC chip, an operating clock supply part for supplying an operating clock to the RAC of the Rambus ASIC chip by varying the operating clock in data writing and reading under the control of the frequency of the test comparator, and a test logic part for outputting data input/output test signals to the test comparator by temporarily storing and comparing data writing/reading signals in the Rambus DRAM.
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