| 摘要 |
A sense amplifier includes current mirror circuits, a NOR gate, inverters and a read data transition detection circuit. First and second read data respectively output from the inverters are input to the read data transition detection circuit. This read data transition detection circuit includes a NOR gate and outputs a logically low level transition detection signal to a data transition node when either of the first and second read data is at a logically high level. The output circuit corresponding to the sense amplifier receives the first read data in response to the transition detection signal. According to the constitution as described above, there can be provided a semiconductor memory in which the circuit scale is prevented from being unnecessarily enlarged and high speed access can be attained.
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