发明名称
摘要 A memory configuration with a self-aligning non-integrated capacitor configuration includes a capacitor configuration and a transistor configuration which can be joined together in a self-aligning manner in such a way that each first contact of a transistor of the transistor configuration is connected to a respective second contact of a memory capacitor of the capacitor configuration. In order to align the two configurations, the second contacts are constructed in a protruding manner, and when joining takes place they engage in a structure including elevations.
申请公布号 JP2001501370(A) 申请公布日期 2001.01.30
申请号 JP19980516091 申请日期 1997.08.07
申请人 发明人
分类号 H01L25/18;H01L21/60;H01L25/00;H01L25/04;H01L27/105;H01L27/108;H01L27/115;(IPC1-7):H01L25/00 主分类号 H01L25/18
代理机构 代理人
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