| 摘要 |
A method for fabricating a multi-level mask ROM includes the steps of forming a plurality of memory cell transistors, depositing and planarizing a dielectric film covering the memory cell transistors, forming an opening in the dielectric film in the area for a selected memory cell transistor, and injecting impurity ions through the opening and the gate electrode of the selected memory cell transistor into the channel area thereof to obtain a desired threshold voltage. Planarization of the dielectric film reduces scattering of the injected ions, thereby preventing transverse extension of the injected ions and achieving a higher integration of the multi-level mask ROM.
|
