Integrated circuit memory devices having highly integrated SOI memory cells therein

摘要

Integrated circuit memory devices having highly integrated SOI memory cells therein include an SOI substrate having a semiconductor active layer therein. A first trench isolation region is also provided. The first trench isolation region extends into and partitions the semiconductor active layer into first and second active regions. These first and second active regions are preferably electrically isolated from each other by the first trench isolation region. First and second access transistors are provided in the first and second active regions, respectively, and a first electrically insulating layer is provided on the SOI substrate. A first bit line is also provided at a first level. The first bit line is electrically connected to a first source/drain region of the first access transistor by a first bit line contact. This first bit line contact extends through the first electrically insulating layer and contacts the first source/drain region of the first access transistor. A second electrically insulating layer is also provided on the first bit line, opposite said first electrically insulating layer and a second bit line is provided on the second electrically insulating layer at a second level above the first level. The second bit line is electrically connected to a first source/drain region of the second access transistor by a second bit line contact which extends through the first and second electrically insulating layers and contacts the first source/drain region of the second access transistor. Higher integration densities can be achieved by dividing the active layer into electrically isolated active regions and then forming bit lines at different levels which are electrically connected to access transistors within these isolated active regions.