| 摘要 |
PROBLEM TO BE SOLVED: To effectively utilize all taps of a shift register, even when a clock frequency cannot be made high. SOLUTION: A cumulative adding part consists of a 1st cumulative adding part 36 which processes and latches an input value in a 1st cumulative addition cycle, a 2nd cumulative adding part 46 which processes and latches an input value in a 2nd cumulative addition cycle, and a switching part 37 which switches outputs of the parts 36 and 46 and can output the outputs. A signal output part 39 outputs a clear signal 63 and a latch signal 64 to the part 36 after the end of the 1st cumulative addition cycle, a clear signal 65 and a latch signal 66 to the part 56 after the end of the 2nd cumulative addition cycle, a switching signal of the part 37 after the respective clear signals 63 and 65, and an output latch signal 68 in a latching part 38 for a cumulative addition output through the part 37, after outputting the signals 64 and 66 to the parts 36 and 46. Consequently, it is possible to effectively utilize the entire taps of a shift register, without making the clock frequency high.
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