| 摘要 |
PURPOSE:To balance a read signal amount and to stabilize a reading operation of a dynamic RAM, etc., by disposing a gate of a switch MOSFET vertically in parallel with a common IO line, and arranging a contact in the same direction as that of a corresponding gate. CONSTITUTION:WIO0 and WIO1 of noninverting signal lines of writing common IO lines WIO0 and WIO1 and WIO0B, WIO1B of inverting signal lines are disposed adjacently. Complementary bit lines for constituting a memory array MARY are so disposed as to be adjacent to complementary bit lines Bp0 and Bq0, etc., connected to writing common IO line WIO0 or WIO1 of two sets of complementary bit lines for constituting each bit line group. Thus, even if a mask is deviated at the time of forming a gate, parasitic capacities of the noninverting and inverting signal lines of the complementary bit lines can similarly be varied to prevent an unbalance thereof. |
