发明名称 |
Transistor formation with local interconnect overetch immunity |
摘要 |
An integrated circuit transistor and a method for making the same are provided. The transistor is resistant to junction shorts due to the overetch of local interconnect trenches. The transistor includes a source/drain region with a first junction and a second junction that is located deeper than the first junction in the portion of the active area susceptible to the overetch junction short phenomena. The second junction is established by ion implantation through a mask that is patterned to create an opening corresponding to the intersection of the layouts of the active area and the local interconnect trench. Using this method, the second junction is only established where needed to prevent shorting and does not impede transistor performance.
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申请公布号 |
US6180475(B1) |
申请公布日期 |
2001.01.30 |
申请号 |
US19980134702 |
申请日期 |
1998.08.14 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
CHEEK JON D.;WRISTERS DERICK J.;FULFORD H. JIM |
分类号 |
H01L21/762;H01L21/768;(IPC1-7):H01L21/336;H01L21/76 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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