| 摘要 |
PROBLEM TO BE SOLVED: To drastically shorten the detection time loss of a true multi-frame synchronization pattern by obtaining a redundant configuration through the use of a plurality of bit pattern detecting means, and at the same time, detecting synchronization concerning a plurality of phases. SOLUTION: An input bit string selecting means 3, selectively and successively outputs eight-phase seven-bit parallel data outputted from 7-bit shift registers 2a-2h to the main bit pattern detecting means 7A and conducts synchronism detection. When a match is recognized by a synchronization pattern comparing part 8a in the phase corresponding to the shift register 2a, for example, a coincidence counter 6a corresponding to the phase is incremented, and a multi-phase selection control part 5 permits the bit pattern detecting means 7A to be exclusive for the phase corresponding to the shift register 2a. In this case, concerning the phase except the one corresponding to the shift register 2a, an input bit string selecting means 3 selectively and successively outputs the outputs from the shift registers 2b-2h to the main bit pattern detecting means 7B and conducts synchronism detection. |
