发明名称 METHOD OF ISOLATING TRENCH OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To improve flatness of a wide trench area by forming a trench area through the simultaneous etching of a semiconductor substrate and a sacrifice substance film pattern and filling the trench area with an element isolating film. SOLUTION: A sacrifice substance film pattern 9b is formed within a second aperture by flattening the sacrifice substance film with a chemical mechanical polishing process till the upper surface of a mask pattern 6 and the upper surface of the first and second spaces 7a, 7b are exposed. Next, the first and second spacers 7a, 7b are selectively removed to expose the lower semiconductor substrate 1. The exposed semiconductor substrate 1 and sacrifice substance film pattern 9b are etched to form the trench area to the first and second apertures, and fill the trench area with the element isolating film. As a result, flatness of the wide trench area can be improved.
申请公布号 JP2001024054(A) 申请公布日期 2001.01.26
申请号 JP20000207238 申请日期 2000.07.07
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 RI KANSHIN
分类号 H01L21/76;H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/76
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