| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory controller which facilitates the change of the capacity of an SDRAM element. SOLUTION: The memory controller 109 interposed between SDRAM 804 and 805 and a CPU for mutually matching plural address lines or plural control signal lines, has a COL signal for identifying whether the address line is a column signal or row signal and mutliplexers 502 and 503 for selectively setting the address line to be used for the column signal or address line to be used for the row signal on the basis of the COL signal.
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