发明名称 |
PLURAL LINE BUFFER TYPE MEMORY LSI |
摘要 |
PURPOSE: To reduce a memory access delay with a simpler configuration and operation (control method). CONSTITUTION: A direct prefetch control unit 161 controls to directly read data in a segment unit from a memory cell array 111 to a line buffer 121 based on a direct prefetch command. A direct restoration control unit 162 controls to directly write back the data in a segment unit from the line buffer 121 to the memory cell array 111 based on a direct restoration command. A buffer lead control unit 163 controls to read data in a word unit from the line buffer 121 externally based on a buffer read command. A buffer write control unit 164 controls to write external data in a word unit in the line buffer 121 based on a buffer write command.
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申请公布号 |
KR20010007493(A) |
申请公布日期 |
2001.01.26 |
申请号 |
KR20000034690 |
申请日期 |
2000.06.23 |
申请人 |
NEC CORP |
发明人 |
MOTOMURA MASATO |
分类号 |
G11C11/401;G06F12/00;G06F12/02;G11C7/10;G11C8/06;(IPC1-7):G11C8/06 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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