SYSTEM CAPABLE OF ADJUSTING CLOCK PHASE OF AD CONVERTER

摘要

PURPOSE: A system capable of adjusting clock phase of an ad converter is provided to clock an analog-to-digital converter by using an optimum clock phase in an IC having a plurality of differential clock signals. CONSTITUTION: The analog-to-digital converter(80) having its performance in the presence of clock noise interference improved is equipped with a sampling clock phase selecting circuit(85) and so controlled as to operate at optimum sampling time intervals against interference noise. The selecting circuit(85) is equipped with a device for generating multiple sampling clock phases and a multiplexer(82) which is connected to multiple phase inputs so as to select the optimum clock phase.