SYSTEM WITH PLURAL BUS CONTROLLERS

摘要

PROBLEM TO BE SOLVED: To provide a system capable of efficiently transferring data between processors. SOLUTION: A bus controller 30 is equipped with a processor bus 2 for connecting a processor 1, a memory bus 12 for connecting a memory, a common bus 4 for connecting plural processors 1 to each other, and circuits 31 to 40 which allow respective processors 1 to share the spaces of memories 13 connected to the memory buses 12 of respective bus controllers 30 when plural processors 1 are connected through the common bus 4.