A METHOD FOR IMPROVING INTERRUPT RESPONSE TIME

摘要

A method and apparatus for rapidly detecting the source of an interrupt. A multi-bit interrupt state register (200) is provided which registers the occurrence of an interrupt in response to an interrupt event. The outputs of the interrupt state register (200) are coupled to an interrupt vector register (202) which is memory mapped and directly accessible to a processor (30) via load and store instructions. The interrupt vector register (202) is continuously updated to reflect the current state of the interrupt state register (200). The processor (30) may read the interrupt vector register (202) with low latency, store the contents of the interrupt vector register (202) in a general purpose register within the processor (30), and determine the source of interrupts via bit test instructions performed on the general purpose register. The bits of the interrupt state register (200) may be cleared by the processor (30).