发明名称 A PROCESSOR ARCHITECTURE
摘要 <p>A processor architecture is adapted to program languages operating with a sequential instruction flow and handling data through use of lists or tuples or simple types. It comprises a program holding means (1), an instruction holding means (2, 3) a data memory means (5) storing data objects, and execution means (7). Means (4, 5, 6) are provided for handling references to data objects referenced by bindings and comprising means (6) to increment reference counts to a data object and to decrement reference counts to a data object in dependence of an actual instruction from the instruction holding means (2, 3).</p>
申请公布号 WO2001006355(A1) 申请公布日期 2001.01.25
申请号 SE2000001494 申请日期 2000.07.14
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