| 摘要 |
<p>A data transfer technique employs direct memory access (DMA) logic (50) to transfer data to a memory (20) and simultaneously store the data into a buffer (40) that is closely coupled to a processor (28), enabling the processor (28) to access the data quicker than if access to the memory (20) were required. The simultaneous transfer is selectively enabled and disabled by the processor (28), so that only those portions of the data that are actually needed by the processor (28) are stored into the buffer (40). The technique is used on a network interface card (NIC) (10), in conjunction with host memory interface logic that transfers packets and packet descriptors from host memory to memory (20) on the NIC. The DMA logic (50) is controlled through the use of DMA descriptors residing on ring data structures in the NIC memory (20). The processor (28) sets the value of a flag in a descriptor to indicate whether the data involved in a DMA transfer is to be written to the buffer (40).</p> |
