发明名称 Analogue to digital converter system
摘要 An analogue to digital converter system for digitizing a stream of analogue symbols, the analogue to digital converter system includes an analogue to digital converter for sampling the symbols at predetermined sample timings and a feedback loop for adjusting the sample timings. The feedback loop includes an eye opening detector connected to an output of the analogue to digital converter and responsive to successive digitized symbol samples to determine eye opening signals. The eye opening detector includes a deviation detector for determining a deviation signal representative of a deviation of a digitized symbol sample value with respect to a mean sample value. Preferably, a variance measurement calculator calculates the variance of these deviations. A feedback control is responsive to successive eye opening signals to generate timing control signals for adjusting the sample timings. The deviation detector can employ a fixed means sample value or can determine the mean sample value from a plurality of digitized sample values over a predetermined period. A variance calculator calculates a variance signal representative of a variance of a deviation signal value with respect to a mean deviation value. The variance calculator can determine the mean deviation value from a plurality of digitized sample values over a predetermined period. Successive variance values form the eye opening signals and an eye opening signal is output in response to each digitized symbol sample. <IMAGE>
申请公布号 GB2319915(B) 申请公布日期 2001.01.24
申请号 GB19960024842 申请日期 1996.11.29
申请人 * LSI LOGIC CORPORATION 发明人 STEVEN RICHARD * RING
分类号 H03M1/12;H04L7/00;H04L7/02;H04L7/033;(IPC1-7):H03M1/06 主分类号 H03M1/12
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