发明名称 DECODER AND DECODING METHOD
摘要 The deterioration of an error characteristic obtained at a point where a transfer method is changed is suppressed. A first adder calculates a SM value obtained when the state 00 is changed to the state 00, and outputs it to a comparator. A second adder calculates a SM value obtained when the state 01 is changed to the state 00, and outputs it to the comparator. The comparator compares the SM values, selects a path having the larger likelihood, and outputs to a register having a set and a reset. An ACS controller detects a condition in which the state transition of fixed information TAB1 is uniquely determined, and outputs a reset signal to the register having a set and a reset, which stores the SM value of that state, to set the value of the register to zero. The ACS controller 85 also outputs set signals to registers having sets and resets, which store the SM values of the states other than the state 00 of the fixed information TAB1, to set them to the maximum value. <IMAGE>
申请公布号 EP1071217(A1) 申请公布日期 2001.01.24
申请号 EP19990959802 申请日期 1999.12.14
申请人 SONY CORPORATION 发明人 IKEDA, TAMOTSU;MIYAUCHI, TOSHIYUKI
分类号 H04L27/22;H03M1/00;H03M13/23;H03M13/41;H04B7/185;H04L27/00;(IPC1-7):H03M1/00 主分类号 H04L27/22
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