| 摘要 |
<p>This invention refers to a bipolar transistor obtained by means of a process for CMOS devices of non volatile memories, and in particular to an integrated circuit comprising a vertical transistor at high gain. Besides it refers to a building process of a bipolar transistor obtained by means a process for CMOS devices of non volatile memories. In one embodiment the integrated circuit obtained by means of a process for CMOS devices of non volatile memories comprises a semiconductor substrate (2) having a first type of conductivity, a pMOS transistor formed above said substrate (2), a nMOS transistor formed above said substrate (2), a bipolar transistor (1) comprising: a buried semiconductor layer (4) having a second type of conductivity placed at a prefixed depth from the surface of said bipolar transistor (1), a isolation semiconductor region (5) having a second type of conductivity in direct contact with said buried semiconductor layer (4) and suitable for delimiting a portion of said substrate (2) forming a base region (3), a emitter region (8) of said transistor (1) formed within said base region (3) having a second type of conductivity, a base contact region (6) of said transistor (1) formed within said base region (3) having a first type of conductivity, a collector contact region (7) of said transistor (1) formed within said isolation semiconductor region (5) having a second type of conductivity, characterised in that said base region (3) has a doping concentration included between 10<16> and 10<17> atoms/cm<3>. <IMAGE></p> |
