发明名称 |
Semiconductor memory device, semiconductor device, and electronic apparatus using the semiconductor device |
摘要 |
A memory cell (1) with a MOS transistor (5) and a data-storing capacitor (7). One of two input/output electrodes of the MOS transistor (5) is connected to a bit line (36) and a gate electrode is connected to a word line (38). A first electrode (6) of the data-storing capacitor (7) is connected to the other input/output electrode of the MOS transistor (5) and a second electrode (14) is connected to a potential control circuit (40). When the data stored in the memory cell (1) is "HIGH", the potential control circuit (40) changes the potential of the second electrode (14) of the data-storing capacitor (7) from a precharge potential VCC/2 to a ground potential GND after data-writing and data-readout operations are completed. When the data stored in the memory cell (1) is "LOW", the potential control circuit (40) changes the potential of the second electrode (14) of the data-storing capacitor (7) from the precharge potential VCC/2 to a power potential VCC after data-writing and data-readout operations are completed.
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申请公布号 |
US6178121(B1) |
申请公布日期 |
2001.01.23 |
申请号 |
US19990367053 |
申请日期 |
1999.09.28 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
MARUYAMA AKIRA |
分类号 |
G11C11/4074;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/4074 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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