发明名称 Interface circuit and method of setting determination level therefor
摘要 An interface circuit includes first and second current mirrors, first and second input circuits, and a reference setting unit. Each of the first and second current mirror circuit has a current input terminal and a current output terminal. The first input circuit has a first transistor having a gate to which an input signal is input and a drain connected to the current output terminal of the first current mirror circuit. The second input circuit has a second transistor having a gate to which a predetermined reference voltage is input and a drain connected to the current output terminal of the second current mirror circuit. The reference setting unit is connected to the current input terminal to set a current amount flowing to the current output terminal as a logic determination level of the first transistor. A method of setting a determination level for the interface circuit is also disclosed.
申请公布号 US6177816(B1) 申请公布日期 2001.01.23
申请号 US19980097660 申请日期 1998.06.16
申请人 NEC CORPORATION 发明人 NAGATA KYOICHI
分类号 H03K5/08;G11C11/409;H03K19/00;H03K19/0175;H03K19/0185;(IPC1-7):H03K19/017 主分类号 H03K5/08
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