发明名称 Method to form MOSFET with an elevated source/drain for PMOSFET
摘要 A gate insulator layer is formed over the semiconductor substrate and a first silicon layer is then formed over the gate insulator layer. An anti-reflection layer is formed over the first silicon layer. A gate region is defined by removing a portion of the gate insulator layer of the first silicon layer and of the anti-reflection layer. A portion of the gate insulator layer is removed to have undercut spaces under the first silicon layer. A dielectric layer is then formed on the semiconductor substrate, on the sidewalls of the gate region, and within the undercut spaces. A spacer structure containing first type dopants is then formed on the sidewalls of the gate region. Following the removal of the anti-reflection layer, a second silicon layer containing second type dopants is formed over the semiconductor substrate and the first silicon layer. Finally, a thermal process is performed to the semiconductor substrate for diffusing the first type dopants and the second type dopants into the semiconductor substrate.
申请公布号 US6177323(B1) 申请公布日期 2001.01.23
申请号 US19990303143 申请日期 1999.04.30
申请人 TEXAS INSTRUMENTS - ACER INCORPORATED 发明人 WU SHYE-LIN
分类号 H01L21/225;H01L21/28;H01L21/336;H01L29/417;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L21/225
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