| 摘要 |
PROBLEM TO BE SOLVED: To ensure a power source having the most suitable line width by arranging a first power source terminal on a P-type diffusion layer of a P- channel transistor, arranging a second power source terminal on an N-type diffusion layer of an N-channel transistor, and arranging an I/O terminal on first layer metal. SOLUTION: A P-channel MOS transistor having a source/drain of a P-type diffusion layer 112 is formed in an N-well 111, and a first power source (VDO) terminal 118 is arranged on the P-type diffusion layer 112 turning to the source of the MOS transistor. Similarly, an N-channel MOS transistor having a source/ drain of an N-type diffusion layer 113 is formed in a P-type substrate region outside the N-well, and a second power source (VSS) terminal 119 is arranged on the N-type diffusion layer turning to the source of the MOS transistor. First layer metal 117 is so arranged that both of the transistors act as inverters, and an output terminal is arranged on the metal 117. |
