发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce the occupying areas of I/O cells by arranging I/O cells having a first cell height and I/O cells having a second cell height so that the sides of the cells become flat on an internal core area side, and arranging all second I/O cells along one outer peripheral edge of a semiconductor chip. SOLUTION: On a semiconductor chip 1, an internal core area 2 which becomes an internal circuit forming area is formed at about the central part of the chip 1, and electrode pads 3 which electrically connect the chip 1 to the outside are arranged along the four outer peripheral edges of the chip 1. Then I/O cells 5 having a first cell height are arranged along one outer peripheral edge of the chip 1 so that the sides of the cells on the area 2 side may become flat, and low I/O cells 4 having a second cell height are arranged along the other three outer peripheral edges of the chip 1 so that the sides of the cells on the area 2 side may become flat. In addition, all second I/O cells 4 are arranged along one outer peripheral edge of the chip 1.
申请公布号 JP2001015600(A) 申请公布日期 2001.01.19
申请号 JP19990182047 申请日期 1999.06.28
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 KIMURA MASAHIRO;HONDA TOMOKI
分类号 H01L21/82 主分类号 H01L21/82
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