| 摘要 |
<p>PROBLEM TO BE SOLVED: To suppress increasing chip size and to make erroneous judgment with time hard to cause by providing plural reference transistors being less than the number of write-in levels of memory transistors by one in parallel to a memory transistor seeing from a sense amplifier, selecting this transistor in an alternative way, and generating reference voltage. SOLUTION: A multi-level storage device is provided with a memory transistor 1 being writable with voltage levels of three or more, reference transistors 2-4 outputting first to third reference voltage, a selector 5 outputting one of output of the reference transistors 2-4 as selection voltage, and a sense amplifier 6 outputting output voltage of a level in accordance with the selection voltage. Thereby, a multi-level of two bits stored in the memory transistor 1 can be judged without increasing chip size by adding only three transistors of the reference transistors 2-4 having same size as the memory transistor 1.</p> |
