| 摘要 |
PURPOSE: An apparatus and method is provided to perform DLL correction with stability in a short time period even when the DLL correction range is wide. CONSTITUTION: An apparatus comprises a delay chain unit for delaying either a reference clock or an internal clock so as to remove a skew. The delay chain unit includes a clock delay unit(310a) for delaying the rising edge of a clock and measuring the time period from the delayed time to a falling edge of the clock; and a delay locked loop clock delay unit(310b) activated by the falling edge of the clock and which allows the delay locked loop clock to be activated with the delay time measured by the clock delay unit. The clock delay unit includes a first NAND gate(ND11) for taking as an input a first control signal and the clock signal; a first inverter(INV11) for inverting an output of the first NAND gate and returning to a clock signal input port of the first NAND gate; a second NAND gate(ND31) for taking as an input the inverted output signal of the first NAND gate and the clock signal, and outputting a delay locked loop clock enable signal; and a pass gate(P11) for controlling transmission of the inverted output signal of the first NAND gate to the subsequent unit delay element.
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