| 摘要 |
PURPOSE: A semiconductor memory device is provided which improves set-up time of bank selection signals without changing an operation time point of bank active signals and precharge signals. CONSTITUTION: The device comprises a plurality of memory banks, and includes a circuit which selects one of the memory banks by receiving a bank selection signal and a bank active signal and activates the selected bank, and a circuit which selects one of the plurality of memory banks by receiving the bank selection signal and a precharge signal and precharges the selected bank. The bank precharge signal and the bank active signal are generated by being synchronized to the first clock signal synchronized to an external clock signal, and the bank selection signal is generated by being synchronized to the second clock signal which transits faster than the first clock signal by being synchronized to the external bank signal. If external signals are inputted into pads(41,42), the inputted signals are converted from TTL level to CMOS level through a buffer and are transferred to a bank precharge and bank active signal generation circuit(100) and a bank selection signal generation circuit(200) through 43 and 44 line. The bank precharge and bank active signal generation circuit includes the first and the second switch circuit(50,53) and the first latch circuit(51,52). The bank selection signal generation circuit includes the third and the fourth switch circuit(54,57) and the second latch circuit(55,56).
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