发明名称 WAFER LEVEL PACKAGE
摘要 PURPOSE: A wafer level package is provided to simplify the manufacturing process and to reduce the waste of the semiconductor device by wire-bonding a metal wire. CONSTITUTION: A wafer level package comprises a semiconductor chip formed at a surface thereof with bonding pads(11). A lower insulation layer(20) is coated on the surface of the semiconductor chip in such a manner that the bonding pads(11) are exposed. A metal wire(30) is provided. One end of the metal wire(30) is electrically connected to the bonding pads(11) and the other end of the metal wire(30) is fixed to the lower insulation layer(20). An upper insulation layer is coated on the structure for preventing the metal wire(30) from exposing. The other end of the metal wire(30) is exposed so that a ball land is formed. A solder ball(40) is mounted on the ball land.
申请公布号 KR20010003205(A) 申请公布日期 2001.01.15
申请号 KR19990023410 申请日期 1999.06.22
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JI YEON
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
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