| 摘要 |
PURPOSE: A chip scale package is provided to prevent a crack of a terminal solder ball by mounting a dummy solder ball not flowing an electric signal to an outer part of a terminal solder ball, increase a volume ratio about a package by forming many convex parts on a covering part, and suppress a rack phenomenon by maximally reducing a thermal expansion coefficient. CONSTITUTION: A chip scale package includes a semiconductor chip(10), a lead frame(20), a metal wire(40), a covering part(50), a terminal dummy solder ball(60), and a dummy solder ball(61). The lead frame is mounted to a bonding pad forming surface of the semiconductor chip. The lead frame includes many leads having the same number as the bonding part. A terminal projection part is formed on the bottom of each lead. The dummy leads are arranged between the leads. At least one projection part is formed on a dummy lead. The dummy projection part is mounted to an outer part of the terminal projection part. Each lead is connected to the bonding pad through a metal wire. The bottom of each projection part is molded by the covering part, and is exposed to the outside. A downward projected convex part is formed to a lower covering part of the lead's inner end. A side convex part is formed on outer part of the dummy projection part. Front and rear convex parts are formed to front and rear parts of the terminal and dummy projection parts. The terminal solder ball and the dummy solder ball are mounted to each projection part projected from the covering part.
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