| 摘要 |
PURPOSE: A method for forming an alignment key for a bit line contact of a semiconductor device is provided to prevent a failure in alignment or misalignment due to a difference in depth of the alignment key. CONSTITUTION: A die area(not shown) and a scribe area(S) are defined in a semiconductor device. In particular, the scribe area(S) includes a region(AK) for an alignment key(200). The first interlayer dielectric(21) on a semiconductor substrate(20) is etched, so that the first contact holes for plugs are formed in the die area, but the alignment key region(AK) is exposed in the scribe area(S). A polysilicon layer is then deposited on overall surfaces and etched to produce the plugs in the die area and further to form a polysilicon pattern(22) on the exposed alignment key region(AK) in the scribe area(S). Thereafter, the second interlayer dielectric(23) is formed and etched. Therefore, while the second contact holes for exposing the plugs are formed in the die area, the alignment key(200) is formed in the scribe area(S). Since the polysilicon pattern(22) acts as an etch stopper at the etch of the second interlayer dielectric(23), the alignment key(200) has a uniform depth.
|
