| 摘要 |
PURPOSE: A ferroelectric memory device is provided to suppress the generation of a step coverage between a memory cell region and a peripheral circuit, or in a memory cell region on a chip. CONSTITUTION: The device includes: a cell array having a matrix structure by including a number of storage node lines(SN 0-SN N-1) formed in a row direction, a number of plate lines(CP 0-CP N-1) formed in a column direction, and a number of ferroelectric capacitors whose storage node is connected to the above storage node line in a point where the above storage node line crosses the plate line and whose plate line is connected to the above plate line; a switching unit switching the above storage node line to the first signal line in response to the first control signal; a reference voltage generation unit(100) to induce a reference voltage on the second signal line in response to the second control signal; and a sense amplification unit(200) to sense and amplify a voltage difference between the first signal line and the second signal line. The switching unit comprises a transistor whose source-drain path is connected between the first signal line and the above storage node line and receives the first control signal through its gate, and the first control signal is a Y-address signal. And, the cell plate line is activated or inactivated by a X-address signal.
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