METHOD FOR MANUFACTURING SPLIT GATE FLASH EEPROM CELL

摘要

PURPOSE: A method for manufacturing a split gate flash EEPROM cell is provided to reduce the process steps by directly forming a drain junction without removing a photoresist after performing the first poly etching. CONSTITUTION: A tunnel oxide film(12) and the first polysilicon layer(13) are formed on an upper surface of a silicon substrate(11). Then, the first polysilicon layer(13) is etched. After that, a drain junction(15) is formed by a cell DDD ion implantation process. After forming the drain junction(15), an ONO film(16), the second polysilicon layer(17), TEOS or Arc layer(18) are formed on the structure. Then, the self-aligning etching process is carried out in such a manner that the second polysilicon layer(17) is formed at a side of the drain junction(15) of the first polysilicon layer(13).