发明名称 METHOD OF FORMING DUAL DAMASCENE PROCESS IN SEMICONDUCTOR ELEMENT
摘要 PURPOSE: A method of forming a dual damascene process is to introduce a plug instead of an interlayer anti-etching layer requiring a high selectivity, thereby increasing an electric permitiivity and a packing ability. CONSTITUTION: A method of forming a dual damascene process comprises the steps of: forming an insulation film(21) which is an oxide film on an under construction(20); forming a via contact mask pattern on an upper portion of the insulation film; forming a via contact by etching the insulation film using the mask pattern so as to expose the construction; removing the mask pattern; forming a metal plug by embedding a metal, such as Cu, within the via contact; forming a pattern of a metal line on a predetermined portion of the insulation film; forming a dual damascene structure by trench-etching the insulation film along the pattern of a metal line; and forming a metal wiring(25) by etching the metal such as Cu.
申请公布号 KR20010004188(A) 申请公布日期 2001.01.15
申请号 KR19990024808 申请日期 1999.06.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, YEONG SEO
分类号 H01L21/3205;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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