发明名称 |
DELAY CELL FOR HIGH SPEED AND LOW NOISE RING OSCILLATOR |
摘要 |
PURPOSE: A delay cell for a high speed and low noise ring oscillator is provided to realize a high speed and low noise in a PLL circuit by a differential amplifier and a diode transistor. CONSTITUTION: A delay cell comprises a differential amplifier(50) and a voltage clamping circuit(40) connected to the differential amplifier. The differential amplifier amplifies a differential input to a pair of differential input transistors(51,52) according to adjustment of oscillation frequencies of a current flowing in a ring oscillator by adjusting currents flowing through PMOS and NMOS transistors(53,54,55) using control voltages(PBIAS,NBIAS) defined by a bias circuit, respectively. The voltage clamping circuit facilitates interfacing with other circuits at high frequencies by causing a predetermined number of diode transistors(41,42) not to be connected to either of power supply lines while limiting the outputs of the diode transistors within the range of power voltages.
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申请公布号 |
KR100274154(B1) |
申请公布日期 |
2001.01.15 |
申请号 |
KR19970050031 |
申请日期 |
1997.09.30 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE;KT CORPORATION |
发明人 |
CHAE, SANG HUN;CHO, GYU HYEONG;JUNG, DONG YEOL;SONG, WON CHEOL |
分类号 |
(IPC1-7):H03K3/03 |
主分类号 |
(IPC1-7):H03K3/03 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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