| 摘要 |
PURPOSE: A method for fabricating a surface channel PMOS transistor with a high performance is provided to improve electrical characteristics of the transistor. CONSTITUTION: The first silicon layer(24), a silicon germanium layer(25) and the second silicon layer(26) are formed in a stack on a silicon substrate(21). Next, a gate oxide(27) and a gate polysilicon pattern(28) are formed thereon. The polysilicon pattern(28) is then etched through a gate spacer(29), which leads to a residual polysilicon pattern(28a). Here, exposed portions of the second silicon layer(26) are removed, too. Thereafter, by a selective epi-silicon growing, an epi-silicon germanium layer(30) and a poly-silicon germanium layer(31) are formed on the exposed silicon germanium layer(25) and on the residual polysilicon pattern(28a), respectively. Then, a titanium silicon layer(32) is formed thereon. As a result, a buried/elevated junction region(100) of stacked layers(24,25,30,32), the epi-silicon germanium elevated channel(200) of stacked layers(24,25,26), and a gate electrode(300) of stacked layers(28a,31,32) are formed.
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