| 摘要 |
PURPOSE: A data strobe buffer of a synchronous DRAM is provided to prevent the mis-operation of a chip due to the damping of a data strobe signal(DS). CONSTITUTION: A synchronous DRAM uses a data strobe signal(DS). A dynamic buffer, which makes a pulse by receiving a falling edge of the data strobe signal, does not operates at a small fluctuation of the DS signal, by lowering a comparison voltage(vref) used in the dynamic buffer rather than in a high impedance state(HI-Z). The data strobe buffer of the synchronous DRAM comprises: the first dynamic buffer generating the first pulse by receiving a rising edge of the data strobe signal; the second dynamic buffer generating the second pulse by receiving the falling edge of the data strobe signal; and a voltage generation circuit to generate the comparison voltage dropped rather than the high impedance of the data strobe signal. The second dynamic buffer does not operate at a fluctuation occurred after the last falling edge of the data strobe signal, with the data strobe signal and an output signal of the voltage generation circuit as inputs of the second dynamic buffer.
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