| 摘要 |
PURPOSE: A bootstrap circuit is provided to prevent time for the reading operation time of a flash memory from being delayed as firstly performing a bootstrap operation at an ascending edge of an ATD signal in the reading operation of a flash memory operated by low voltage, secondly performing bootstrap operation at a descending edge of the ATD signal and simultaneously driving a local pump. CONSTITUTION: A word line bootstrap circuit includes first and second precharge circuits(11,12), a high voltage latch circuit(13), a pass transistor, first and second capacitors, and a local pump(14). The first precharge circuit is driven according to a clock signal generated at an ascending edge of an ATD signal and supplies a precharge voltage. The second precharge circuit is driven according to a chip enable signal and supplies a precharge voltage. The high voltage latch circuit latches a high voltage by another clock signal generated at an ascending edge of the ATD signal and outputs a control voltage. The pass transistor is driven according to an output voltage of the high voltage latch circuit. The first and second capacitors bootstrap the electric potential of the output node of the first and second precharge circuits by each clock signal of which a phase is contrary. The local pump compensates a charge loss of the output node of the second precharge circuit at a descending edge of the ATD signal.
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