| 摘要 |
PURPOSE: A method for making a flash memory device is provided to prevent a side diffusion of a drain by processing an annealing process under the condition that an ion-implantation is not performed on the drain area after a primary self align etching process, and reduce a short channel effect by increasing a channel length as long as a spacer part by performing the secondary self-align etching process under the condition that a spacer is formed on a control gate. CONSTITUTION: A field oxide layer is formed on a semiconductor substrate(11), a tunnel oxide layer(12) and the first polysilicon layer(13) are deposited, and the first polysilicon layer is first etched. A dielectric layer(14), the second polysilicon layer(15), and a mask insulating layer(16) are sequentially deposited on the first polysilicon layer, a control gate as of the second polysilicon is formed by an etching process, and a gate electrode of a peripheral circuit area is formed. LDD ion-implantation process is performed in the peripheral circuit area. A primary self-align etching process is performed to remove an exposed part of the etched first polysilicon layer, and thus a stack gate of a source(17) side is only determined. A primary cell source ion-implantation process is performed to form a cell source, and then the first spacer(18) is formed on an etching surface of the cell area and the peripheral circuit area. A self align source etching process and a secondary cell source ion-implantation process are performed to form a source line, and then an annealing process is performed. An exposed part of the first polysilicon layer being twice etched is removed by the secondary self align etching process, a stack gate part of a drain(19) side is determined, and thus a stack gate comprised of a floating gate and a control gate is completed. A cell drain is formed by a cell source/drain ion-implantation process. The second spacer is formed on the first spacer of the cell area and the peripheral circuit area, and then a peripheral circuit source/drain ion implantation process is performed.
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