| 摘要 |
PURPOSE: A method for fabricating a high integrated memory device is provided to prevent oxidation or lift-off of bit lines, to prevent damage of a substrate in an etch process for metal contacts, and to improve step coverage by better profile of contact holes. CONSTITUTION: A silicon substrate(401) is provided with an interlayer dielectric layer(402) thereon. A barrier metal(403), a tungsten layer(404) for bit lines, and a mask nitride layer(405) are then successively formed and patterned on the dielectric layer(402). Next, nitride spacers(406) are formed on sidewalls of the patterned layers(403-405). Thereafter, an oxide layer(407) is formed thereon and polished. In particular, the polishing operation for the oxide layer(407) is performed faster on peripheral regions of a wafer than on central regions. A silicon-rich oxide layer(408) is then formed on the polished oxide layer(407), and capacitors(409) are formed thereon. In the following heat treatment process, the bit lines on the peripheral regions are protected from permeation of oxygen by the silicon-rich oxide layer(408).
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