发明名称 SELF-REFRESH CONTROL CIRCUIT AND SELF-REFRESH CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To reduce power consumption by outputting a prescribed potential meaning that concentrated refreshes are unnecessary at an external I/O terminal when values at the time of starting the self-refresh of an internal binary counter deciding ROW addresses at the time of the self-refresh and values in the case of executing the self-refresh become the same values to eliminate excessive processing operations. SOLUTION: An internal binary counter 200 counts signals CKCBR, CKSELF to output bits C0 to C3 and decides a word line which is refreshed at the time of a CBR and the self-refresh. A latch circuit 300 latches values of respective bits C0 to C3 by a signal SELF to output address values FC0 to FC3 at the time of starting the refresh. EXNOR circuits 400a to 400d and an AND circuit 410 compare values of the bits C0 to C3 with values of FC0 to FC3 in synchronization with the signal CKSELF and when they match, the circuits output '1' at a terminal G and output a high potential at an I/O terminal.
申请公布号 JP2001006356(A) 申请公布日期 2001.01.12
申请号 JP19990173005 申请日期 1999.06.18
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 MURAOKA YUJI
分类号 G11C11/403;(IPC1-7):G11C11/403 主分类号 G11C11/403
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