发明名称 TUNNEL TRANSISTOR AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To obtain a tunnel transistor, which is capable of high integration, high-speed operation and increase in functions and utilizes tunneling, and a manufacturing method of the tunnel transistor. SOLUTION: This tunnel transistor has a laminated structure consisting of a first semiconductor layer 2, which has one conductivity and is degenerated, an isolation layer 3 consisting of a low-impurity concentration semiconductor layer, a second semiconductor layer 4, which has a conductivity opposite to that of the layer 2 and is degenerated, and a third semiconductor layer 5 which has the same conductivity type as that of the layer 2 and is degenerated, on a substrate 1 and the tunnel transistor has a fourth semiconductor layer 6 having the same conductivity-type as that of the layer 2, an insulating layer 7 consisting of a material of an inhibit band width which is wider than those of the materials for the layers 5 and 6 and a gate electrode 8 on the layer 7 extending over from one part of the surface of the layer 2 to the exposed surface of the layer 5. Moreover, the tunnel transistor has a source electrode 9 and a drain electrode 10, which respectively form an ohmic junction to the layers 2 and 4. By the tunnel transistor of this structure and the manufacturing method of the tunnel transistor, since tunnel junctions between the semiconductor layers can be formed without being interrupted during growth, the remaining impurity concentrations in the junction interfaces between the semiconductor layers are reduced, and a surplus current is reduced by more than one order of magnitude. As a result, the negative resistance characteristics of the transistor are enhanced, and the range of application of the transistor which is used as a functional element is expanded.
申请公布号 JP2001007324(A) 申请公布日期 2001.01.12
申请号 JP19990171814 申请日期 1999.06.18
申请人 NEC CORP 发明人 UEMURA TETSUYA
分类号 H01L29/68;H01L29/78;H01L29/786;(IPC1-7):H01L29/78 主分类号 H01L29/68
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