| 摘要 |
PROBLEM TO BE SOLVED: To make increasable the instruction issue bus bandwidth without increasing the size of a cache memory by selectively storing instructions in the cache memory related to a corresponding function unit. SOLUTION: A 1st instruction is fetched from a memory and it is judged whether its PS matches with one of entries of a tag PC cache (S502, 504). When the tag PC of the fetched instruction matches with one of the entries of one of tag PC caches, the PC of the fetched instruction is updated into a matching target PC specified in a cache memory (S504, 514). When a target instruction is stored in the fetched instruction, the target instruction is fetched from a program memory (S516, 518), but when the target instruction is stored in the fetched instruction, the target instruction is not requested of a programming memory; and a target operation code is injected into a target function unit (S520) in either case together with the target instruction. |
