| 摘要 |
PROBLEM TO BE SOLVED: To provide an EPROM with a sufficient error correction function in a small circuit scale. SOLUTION: This EPROM is provided with two EPROM cells MA, MB in each of which one bit data of the same logical value is written for every n data output lines L, an OR gate 10 and an exclusive OR gate 14 receiving each output bA, bB of MA, MB as an input, an inverter 12 for inverting an output of the OR gate 10, and a switching circuit 16, respectively. And the switching circuit 16, when '1' is outputted from the exclusive OR gate 14 of the same data output line, and an output of an adding circuit 18 performing addition of 1 bit to the output of each OR gate 10 does not coincide with a parity bit of n-bit data written in the EPROM cells MA, MB and '1' is outputted from an exclusive OR gate 20, outputs an output of the inverter 12 or an output of the OR gate 10 to the corresponding data output line. |
