发明名称 ARRANGEMENT WIRING METHOD OF MACROCELL IN SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To realize high density of a semiconductor integrated circuit device by reducing the area of each macro cell by arranging a macrocell without a substrate contact, arranging a metallic wiring for connecting macrocells and separately installing a substrate contact cell on a metallic wiring from a macrocell. SOLUTION: When a layout design by an automatic wiring tool is started, a macrocell 43 without a substrate contact inside the macrocell 43 is arranged by a macrocell automatic arrangement step based on layout design of a semiconductor integrated circuit device. Then, a wiring, connecting the macrocells 43 mutually is arranged by a macrocell automatic wiring step and a substrate contact 50, is arranged by a substrate contact post-installation program consisting of a substrate contact post-installation step of a P-well part and a substrate contact post-installation step of an N-well part. Thereby, the area of each macrocell 43 can be reduced by the portion of an area occupied by the substrate contact cell 50.
申请公布号 JP2001007210(A) 申请公布日期 2001.01.12
申请号 JP19990173060 申请日期 1999.06.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUJIMOTO SHINYA
分类号 H01L21/82;(IPC1-7):H01L21/82 主分类号 H01L21/82
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