发明名称 |
POWER AMPLIFIER FOR EFFICIENTLY AMPLIFYING LINEARLY MODULATED SIGNALS |
摘要 |
A power amplifier includes a carrier amplifier path and a peaking amplifier path. The carrier amplifier path includes a carrier amplifier (208), and an impedance transforming network (214). The peaking amplifier path includes a peaking amplifier (210), an impedance transforming network (216), and a phase delay quarter wave element (226). The arrangement forms an inverted Doherty combiner where as the nominal impedance at a summing node (230) increases with increased conduction from the peaking amplifier, the load impedance at the output of the carrier amplifier decreases so as to maintain the carrier amplifier at a saturation point as the input signal (232) increases, and results in a reduction of the number of phase delay elements needed over a conventional Doherty approach. In a preferred embodiment the carrier and peaking amplifiers consist of cascaded stages, and are disposed on a common integrated circuit die (304). The impedance transforming networks and phase delay element are disposed on a common substrate (306), as is an input splitter network (308).
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申请公布号 |
WO0103289(A1) |
申请公布日期 |
2001.01.11 |
申请号 |
WO2000US17654 |
申请日期 |
2000.06.27 |
申请人 |
MOTOROLA INC. |
发明人 |
STENGEL, ROBERT, E.;GU, WANG-CHANG, A.;LEIZEROVICH, GUSTAVO, D.;CYGAN, LAWRENCE, F. |
分类号 |
H03F1/02;(IPC1-7):H03F3/28;H03F3/68 |
主分类号 |
H03F1/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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