发明名称 A SYSTEM AND METHOD FOR IMPROVING MULTI-BIT ERROR PROTECTION IN COMPUTER MEMORY SYSTEMS
摘要 <p>A system and method for storing error correction check words in computer memory modules. Check bits stored in physically adjacent locations within a dynamic random access memory (DRAM) chip are assigned to different check words. By assigning check bits to check words in this manner, multi-bit soft errors resulting from errors in two or more check bits stored in physically adjacent memory locations will appear as single-bit errors to an error correction subsystem. Similarly, the likelihood of multi-bit errors occurring in the same check word may be reduced.</p>
申请公布号 WO2001002959(A1) 申请公布日期 2001.01.11
申请号 US2000017911 申请日期 2000.06.29
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