| 摘要 |
<p>The invention relates to a ferroelectric transistor which has two source/drain areas (13) and a channel area between them, in a semiconductor substrate (11), and in which a first dielectric intermediate layer (14) is situated on the surface of the channel area. Above said first dielectric intermediate layer (14) are a ferroelectric layer (15), a second dielectric intermediate layer (16) and a gate electrode (17). The second dielectric intermediate layer (16) reduces the leakage currents through the ferroelectric layer (15) to the interface between the first dielectric layer (14) and the ferroelectric layer, hereby improving the data management.</p> |
